Product Summary

The XC9572-10TQG100C is a high-performance CPLD providing advanced in-system programming and test capabilities for general purpose logic integration. The XC9572-10TQG100C is comprised of eight 36V18 Function Blocks, providing 1,600 usable gates with propagation delays of 7.5 ns.

Parametrics

XC9572-10TQG100C absolute maximum ratings: (1)VCC, Supply voltage relative to GND: –0.5 to 7.0 V; (2)VIN, Input voltage relative to GND: –0.5 to VCC + 0.5 V; (3)VTS, Voltage applied to 3-state output: –0.5 to VCC + 0.5 V; (4)TSTG, Storage temperature (ambient): –65 to +150℃; (5)TJ, Junction temperature: +150℃.

Features

XC9572-10TQG100C features: (1)7.5 ns pin-to-pin logic delays on all pins; (2)fCNT to 125 MHz; (3)72 macrocells with 1,600 usable gates; (4)Up to 72 user I/O pins; (5)5V in-system programmable; (6)Endurance of 10,000 program/erase cycles; (7)Program/erase over full commercial voltage and temperature range; (8)Enhanced pin-locking architecture; (9)Flexible 36V18 Function Block; (10)90 product terms drive any or all of 18 macrocells within Function Block; (11)Global and product term clocks, output enables, set and reset signals; (12)Extensive IEEE Std 1149.1 boundary-scan (JTAG) support; (13)Programmable power reduction mode in each macrocell; (14)Slew rate control on individual outputs; (15)User programmable ground pin capability; (16)Extended pattern security features for design protection; (17)High-drive 24 mA outputs; (18)3.3V or 5V I/O capability; (19)Advanced CMOS 5V FastFLASH technology; (20)Supports parallel programming of more than one XC9500 concurrently; (21)Available in 44-pin PLCC, 84-pin PLCC, 100-pin PQFP, and 100-pin TQFP packages.

Diagrams

XC9572-10TQG100C block diagram

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IC REG BUCK ADJ 1A DL 10MSOP

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0-1: $1.19
1-10: $1.07
10-25: $0.96
25-100: $0.86
100-250: $0.77
250-500: $0.67